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Feb. 26, 2024

ASICFPGA releases new advanced Demosaicing core.

ASICFPGA has announced the release of new advanced Demosaicing core, support Multiple Pixel Processing of 1, 2, or 4 pixels per clock. In previous versions of the core, the performance of reducing false color and zipper errors was insufficient. The new advanced demosaicing core can keep high resolution in spite of reducing false color and zipper errors.

Mar. 10, 2023

ASICFPGA releases new ISP core supporting AXI4-Lite, AXI4-Stream interface, new AE, and new AWB.

ASICFPGA has announced the release of a new ISP core and demo board that supports AXI4-Lite, AXI4-Stream interface, new AE, and new AWB. The ISP cores, which include the HDR, Star, and Pro versions, support Multiple Pixel Processing of 1, 2, or 4 pixels per clock. Additionally, the new core is capable of supporting 4Kp60 and 4Kp120 at the FPGA device.

Mar. 28, 2021

ASICFPGA releases new ISP core supporting Multiple Pixel Processing.

The ISP cores including HDR, Star and Pro version support Multiple Pixel Processing of 1, 2 or 4 pixels per clock. The new core could support 4Kp60 or 4Kp120 at FPGA device.

May 08, 2020

ASICFPGA releases new advanced 2D Noise reduction core and 2D+3D Noise reduction core.

The performance of the new advanced 2D noise reduction core is much improved over the previous version core. The new core removes much more color noise and luminance noise than the previous version core. With the performance improvement of new advanced 2D noise filter, the performance of 2D+3DNR filter is improved also. The new core removes much more color noise and luminance noise than the previous version core. And ghost images are less than the previous versions of Core.

Apr.19, 2019

ASICFPGA releases new HDR ISP core (three exposure, 120dB, 3-DOL HDR, IMX290).

The new HDR cores can handle up to three exposure images and the dynamic range can handle up to 120dB. A demo board has been developed using the Xilinx Kintex 7 board and Sony 3-DOL IMX290 HDR sensor.